4 bit Arithmetic Circuit

Basic Theory:

An arithmetic circuit is a logic circuit that performs basic arithmetic operations like addition, subtraction, increment, decrement and transfer operations using a single combinational circuit. It uses multiplexers and full adders to do so. The selection bits, along with an additional input at 2 and 3 input positions of the multiplexer, determine the type of operation to be done on the input data. This is further clarified by the function table below. As usual, a 4-bit arithmetic circuit works with 4-bit data.

Function Table for Arithmetic Circuit:

Circuit Diagram:

Reference:

Mano, M. (n.d), Register Transfer and Micro-operations: Arithmetic Circuit, Computer System Architecture (3^rd Edition), pp. 106-108

4 bit Binary Decrementer

Basic Theory:

The binary decrementer decreases the value stored in a register by ‘1’. For this, we can simply add ‘1’ to the each bit of the existing value stored in a register. This is basically the concept of two's complement used for subtraction of '1' from given data. It is made by cascading ‘n’ full adders for ‘n’ number of bits i.e. the storage capacity of the register to be decremented. Hence, a 4-bit binary decrementer requires 4 cascaded full adder circuits. As stated above we add '1111' to 4 bit data in order to subtract '1' from it. 

Circuit Diagram:

Observed Values:

Following set of values were obtained in observation.
1.      0011 => 0010
2.      1010 => 1001
3.      1101 => 1100
4.      0010 => 0001
5.      0000 =>1111

Reference:

Mano, M. (n.d), Register Transfer and Micro-operations: Arithmetic Circuit, Computer System Architecture (3^rd Edition), pp. 106-108

4 bit Binary Incrementer

Basic Theory:

The binary incrementer increases the value stored in a register by ‘1’. For this, it simply adds ‘1’ to the existing value stored in a register. It is made by cascading ‘n’ half adders for ‘n’ number of bits i.e. the storage capacity of the register to be incremented. Hence, a 4-bit binary incrementer requires 4 cascaded half adder circuits.

Circuit Diagram:

Observed Values:

Following set of values were obtained in observation.
1.      0011 => 0100
2.      1010 => 1011
3.      1101 => 1110
4.      0010 => 0011
5.      1111 => 0000; Cout = 1

Reference:

Gamezero.com (n.d.), Designing and Building our 4-bit Addition Engine, Processor Design, Accessed: February 15, 2013, Retrieved from: http://www.gamezero.com/team-0/articles/math_magic/micro/stage1.html

4 bit Adder/Subtractor Circuit

Basic Theory:

It is possible to make a logical circuit that can do both addition and subtraction based on the mode selection concept. In case of a four bit adder-subtractor, two four bit binary numbers are added or subtracted on the basis of the operation mode. The main principle behind it is subtraction using the two’s complement method. 

The expression for this is:

D_n = A - B = A + B’ +1.

This kind of circuit is a ripple-carry adder circuit along with some additional XOR gates to add the subtraction functionality. It works as a full adder if the selected mode is 0 “zero”, and works as a full subtractor if the mode is selected as 1 “one”. The logic diagram can be seen below.

Circuit Diagram:

Observed Values:

Following set of values were obtained in observation.

For addition,
1.      0011 + 0100 = 0111
2.      1101 + 0001 = 1110
3.      1101 + 0010 = 1111
4.      0010 + 0010 = 0100
5.      1000 + 1000 = 0000; Cout = 1

For subtraction,
1.      1011 – 1100 = 1111
2.      1010 – 0101 = 0101
3.      1111 – 1101 = 0010
4.      0011 – 0011 = 0000
5.      1000 – 0100 = 0100

Reference:

Wikipedia (2013), Adder-subtractor, Accessed: February 12, 2013, Retrieved from: http://en.wikipedia.org/wiki/Adder%E2%80%93subtractor

4 bit Adder Circuit

Basic Theory:

It is possible to make a logical circuit using numerous full adders to add n-bit numbers. In case of a four bit adder, the number of bits is four; hence it is a 4-bit adder. The main principle behind it is that, “each full adder inputs a Cin, which is the Cout of the previous adder”. This kind of adder is called a ripple-carry adder or a parallel adder, since each carry bit "ripples" to the next full adder in parallel. We must note that the first (and only the first) full adder may be replaced by a half adder. The layout of a ripple-carry adder is simple, which allows for fast design time; however, the ripple-carry adder is relatively slow, since each full adder must wait for the carry bit to be calculated from the previous full adder.

Boolean Expressions (for Full Adder):

S_n = A⊕B⊕C

C_n = BC + (B⊕C) A

Circuit Diagram:

Observed Values:

Following set of values were obtained in observation.

1.      0011 + 0100 = 0111
2.      1101 + 0001 = 1110
3.      1101 + 0010 = 1111
4.      0010 + 0010 = 0100
5.      1000 + 1000 = 0000; Cout = 1

Reference:

Wikipedia (2013), Adder (electronics), Ripple-carry Adder, Accessed: February 8, 2013, Retrieved from: http://en.wikipedia.org/wiki/Adder_%28electronics%29#Ripple-carry_adder